GIT: unionfs2-2.6.27.y: x86, Calgary: Increase max PHB number

[Erez Zadok]

commit 6e992ba3c5662c42cb3b555fdf67e4dd4dcac84c
Author: Darrick J. Wong <djwong at us.ibm.com>
Date:   Thu Jun 24 14:26:47 2010 -0700

    x86, Calgary: Increase max PHB number
    
    commit 499a00e92dd9a75395081f595e681629eb1eebad upstream.
    
    Newer systems (x3950M2) can have 48 PHBs per chassis and 8
    chassis, so bump the limits up and provide an explanation
    of the requirements for each class.
    
    Signed-off-by: Darrick J. Wong <djwong at us.ibm.com>
    Acked-by: Muli Ben-Yehuda <muli at il.ibm.com>
    Cc: Corinna Schultz <cschultz at linux.vnet.ibm.com>
    LKML-Reference: <20100624212647.GI15515 at tux1.beaverton.ibm.com>
    [ v2: Fixed build bug, added back PHBS_PER_CALGARY == 4 ]
    Signed-off-by: Ingo Molnar <mingo at elte.hu>
    Signed-off-by: Greg Kroah-Hartman <gregkh at suse.de>

diff --git a/arch/x86/kernel/pci-calgary_64.c b/arch/x86/kernel/pci-calgary_64.c
index 34bc987..90bc1c3 100644
--- a/arch/x86/kernel/pci-calgary_64.c
+++ b/arch/x86/kernel/pci-calgary_64.c
@@ -102,11 +102,16 @@ int use_calgary __read_mostly = 0;
 #define PMR_SOFTSTOPFAULT	0x40000000
 #define PMR_HARDSTOP		0x20000000
 
-#define MAX_NUM_OF_PHBS		8 /* how many PHBs in total? */
-#define MAX_NUM_CHASSIS		8 /* max number of chassis */
-/* MAX_PHB_BUS_NUM is the maximal possible dev->bus->number */
-#define MAX_PHB_BUS_NUM		(MAX_NUM_OF_PHBS * MAX_NUM_CHASSIS * 2)
-#define PHBS_PER_CALGARY	4
+/*
+ * The maximum PHB bus number.
+ * x3950M2 (rare): 8 chassis, 48 PHBs per chassis = 384
+ * x3950M2: 4 chassis, 48 PHBs per chassis        = 192
+ * x3950 (PCIE): 8 chassis, 32 PHBs per chassis   = 256
+ * x3950 (PCIX): 8 chassis, 16 PHBs per chassis   = 128
+ */
+#define MAX_PHB_BUS_NUM		384
+
+#define PHBS_PER_CALGARY	  4
 
 /* register offsets in Calgary's internal register space */
 static const unsigned long tar_offsets[] = {